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 HT6750A Date Printer
Features
* Operating voltage: 2.4V~5.5V * Operating current: < 3mA at 3.0V * Constant voltage output (1.8V5%) at 2.4V~5.5V * 32K crystal oscillator (Internal capacitor and resistor) * Calendar and time adjustment * Date imprinting modes
operating for driving lamp (1.8V/40mA)
* LCD contrast can not distort at 2.4V~5.5V operating * LCD display drive 1/3 duty, 1/2 bias, frame frequency
(Y/M/D, D/H/Min, Imprint off, M/D/Y, D/M/Y)
* Mode is selected by cyclically turning * 4 film printing times is selectable or external input
is 42.67Hz
* At power interrupt, data hold up > 1.0s
control (30ms/45ms/60ms/external control)
* Direct resetting system * Lamp output time control * Provides module test circuit
(between VDD and VSS connect a 0.1mF capacitor)
* Built-in power on reset function
General Description
The 6-Digital Timer is a camera data optical printer. Displaying and printing of data (Year Month Day/Day Hour: Minute/OFF/Month Day Year/Day Month Year) can be selected by mode selection. Date updating is a fully automatic calendar from the year 1998.1.1 to 2049.12.31.
Block Diagram
CO M 1~CO M 3TEST2
OSCI OSCO
O s c illa to r
D iv . 3 2 K
D iv . 6 0
D iv . 6 0
SEGO RESE MOD SE SE
N E T T
D iv . 3 2 K L C o n tro l C ir c u it
D iv . 2 8 , 2 9 , 30 or31
D iv . 2 4
VDD VSS
V.2 V.4 LC1 LC2 T D X
Year C o u n te r
P r in t/L a m p C o n tro l
MUX
MUX
MUX
Im - P r in t M a r k
Lam p
SEG1
SEG 15
Rev. 1.00
1
January 17, 2003
HT6750A
Pad Assignment
TEST2 LAM P R.6 TR1 R.4 TR4 TR3 TR2 R.5 VSS 1 VSS 2 3 4 5 6 7 8 9 10 11 12 13 14 SEG 11 15 SEG 12 16 SEG 13 17 SEG 14 18 SEG 15 19 COM3 20 COM2 21 MODE 22 SEL 23 SET 24 SEGON 29 28 27 26 25 VDD OSCI OSCO TEST1 RESET (0 , 0 ) COM1 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG 10 D X T 47 46 45
49
48
44 43 42 41 40
39 38 37 36 35 34 33 32 31 30
R.3 R.2 R.1 V.2 LC1 LC2 V.4 VDD
Chip size: 2680 2460 (mm)2 Chip thickness=12 mil * The IC substrate should be connected to VSS in the PCB layout artwork.
Pad Coordinates
Pad No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 Rev. 1.00 X -1012.997 -1154.997 -1112.447 -1112.447 -1112.447 -1112.447 -1112.447 -1112.447 -1112.447 -1112.447 -1112.447 -1112.447 -1112.447 -820.147 -674.147 -526.147 -380.147 -232.147 -86.147 61.853 216.853 371.853 526.853 681.853 1095.853 Y 1050.624 952.474 781.274 612.274 429.374 260.374 77.474 -91.526 -274.426 -443.426 -626.326 -795.326 -978.226 -1019.426 -1019.426 -1019.426 -1019.426 -1019.426 -1019.426 -1019.426 -1018.926 -1018.926 -1018.926 -1018.926 -1039.226 2 Pad No. 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 X 1095.853 1095.853 1095.853 1128.153 1113.753 1094.353 1094.353 1094.353 1094.353 1124.553 1124.553 1124.553 1019.553 914.553 809.553 704.553 599.553 494.553 389.553 221.853 74.453 -71.247 -226.247 -487.887 Y
Unit: mm -872.226 -704.226 -537.226 -388.926 -167.026 63.524 241.524 431.524 589.524 798.974 903.974 1008.974 1008.974 1008.974 1008.974 1008.974 1008.974 1008.974 1008.974 1016.974 1016.974 1016.974 1016.974 1001.224
January 17, 2003
HT6750A
Pad Description
Pad No. 1, 2 3, 19, 20 4~18 21 22 23 24 25 26 27 28 29, 30 31 32, 33 34 35~40 41~44 45 46 47 48 49 Note: Pad Name VSS COM1 COM3, COM2 SEG1~SEG15 MODE SEL SET SEGON RESET TEST1 OSCO OSCI VDD VF4 LC2, LC1 VF2 RF1~RF6 TR1~TR4 T D X TEST2 LAMP I/O 3/4 O O I I I I I I O I 3/4 O I O I I I I I I O Internal Connection 3/4 CMOS CMOS CMOS with Pull-high CMOS with Pull-high CMOS with Pull-high CMOS with Pull-high CMOS with Pull-low CMOS with Pull-low CMOS CMOS 3/4 CMOS CMOS CMOS 3/4 3/4 CMOS with Pull-high CMOS with Pull-high CMOS with Pull-high CMOS with Pull-high CMOS Description Negative power supply, ground Output for LCD panel common LCD segment output driver Mode select input pin (Internal pull-high 75K) Correction digit shift switch (Internal pull-high 75K) Correction digit data (Internal pull-high 75K) Est pin, if pull-low will force all segment ON External Reset input (Internal pull-low, 50K) Test pin (not for customer) Crystal oscillator output pin Crystal oscillator input pin Positive power supply Double reference voltage Connected to 0.1mF capacitor Reference voltage Adjust regulator output voltage, TRIM PIN Adjust constant voltage and drive lamp output pin (Open drain) Imprint time select input (Internal pull-high 75K with Latch type) Imprint time external control input (Internal pull-high 75K with Latch type) Imprint trigger input pin (Internal pull-high 75K)* For coustomer test PRINTING LCD use only, pull-low will force Lamp ON and other function is OK (Internal pull-high 75K)** Drive lamp output pin (Open drain)
* The X input has no effect in OFF mode, selection and setting mode; the lamp will be turned off automatically. ** The TEST2 has no effect in selection and setting mode; the lamp will be turned off automatically.
Absolute Maximum Ratings
Supply Voltage .......................................................5.5V Input Voltage ......................................................... 5.5V Storage Temperature ............................ -20C to 60C Operating Temperature...............................0C to 50C
Static Electricity (OFF Power)...................................................................................200pF, 200V, 10 times to each pin Note: These are stress ratings only. Stresses exceeding the range specified under Absolute Maximum Ratings may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability.
Rev. 1.00
3
January 17, 2003
HT6750A
Electrical Characteristics
Symbol VDD Vstr Vstop Iopr1 VL Iopr2 DT0/T DT1/T DT2/T DT3/T Thold I key-on R key-off VIL VIH Parameter Operating Voltage Oscillation Start Voltage Oscillation Stop Voltage Power Consumption (1) Lamp Drop Voltage (Reference VDD) Power Consumption (2) Time Accuracy Time Accuracy Deviation (1) Time Accuracy Deviation (2) Time Accuracy Deviation (3) Data Hold Time ON Recognition Current OFF Recognition Resistance Threshold Voltage Threshold Voltage Test Conditions VDD 3/4 3V 3V 3V No load, Non-printing Ta+20C Constant voltage reference VDD, at VDD=2.4V~5.5V (Load is lamp 1.8V/40mA) No load, Non-printing Ta+50C, RH=80% Ta=+20C Ta=-10C, Deviation against Ta=+20C Ta=+35C, Deviation against Ta=+20C Ta=+50C, Deviation against Ta=+20C At power interrupt (0.1mF at 3V) When VSS=0V, X pin (VSS+0.5V), Other pins X pin, Other pins X Pin ON function With MODE, SEL, SET ON With X pin OFF MODE, SEL, SET OFF function Within 2 sec after power on (Speed up oscillator when at power on reset) Conditions Ta=253C, RH65%, VSS=0V Min. 2.4 2.4 3/4 3/4 1.71 3/4 -90 -170 -25 -95 1 30 10 3 10 VSS VDD -0.5V Typ. 3 3/4 3/4 2 Max. 5.5 3/4 1.8 3 Unit V V V mA V mA sec/ Month sec/ Month sec/ Month sec/ Month s mA mA MW MW V V
3V
1.8 3/4 0 -112 -8 -55 3/4 3/4 3/4 3/4 3/4 3/4 3/4
1.89
3V 3V 3V 3V 3V 3V 3V 3V 3V 3V
9 90 -70 0 -10 3/4 3/4 3/4 3/4 3/4 VSS +0.5V VDD
Rev. 1.00
4
January 17, 2003
HT6750A
Functional Description
* 6-digit timer in 5 modes: Mode selection for 3 key
applications
* Date from 1-1-98 to 31-12-49 (2049) automatic
OFF recognition: when the ON key is pressed longer than TOFF , OFF is recognized; the next input has to wait. 31.25msTOFF62.5ms,
* If at least one key-ON time pulse is detected during
updating, including leap years.
* Matrix address LCD interface in 1/3 duty, 1/2 bias,
frame frequency is 43Hz.
* Printing enable is Go low trigger in X input. VXU1/2
VDD, Debounce in printing trigger: 1msTDEBOUNCE2ms.
* After printing, 3/4 will blink 3 times at 1Hz rate. * Print means lamp output LOW to light lamp. Lamp
the TOFF period, the time before the key-ON pulse is regarded as the key-ON time. The lamp light-up time is controlled depending on the levels of D and T pins. D H H L L T H L H L Lamp signal output time 60ms 30ms Depend on X input pulse width 45ms
output sink current is 40mA Min. (Constant current source ), typical 45mA (VDD=2.4V~5.5V). * Printing time: 30ms, 45ms, 60ms or programmable (determined by the control CPU of the camera), selected by D or T and Topt inputs.
* Built-in crystal (32768Hz) oscillator circuit (capacitor
and resistor).
* At OFF mode ( - - - - - - ), printing (Lamp on) and
* X pin must be carefully protected, the system cannot
data setting is inhibited in any case and printing 3/4 mark OFF.
be reset when in 200V and 200pF one-shot test. (add external resistor 10kW series with the pad; its better if it works well without the resistor)
* At OFF mode, no data can be set. * The X input is rejected in some condition, such as:
'Y
M M
D
D
H :M
O..
A s ia n C a le n d a r
D a y , H o u r , M in u te

OFF mode Selection and Setting mode (In these condition the lamp must be turned off)
M M
D
'Y
D
M M
'Y
* Power on reset and after crystal is stable (max. 2 sec) * Regulator output voltage accuracy is 2V3.0% (after
A m e r ic a n C a le n d a r
E u r o p e a n C a le n d a r
TRIM)
* Display in Day-Hour-Minute mode, in 24-hour system
* Default value at power on is 98 1 1 (ASIAN DATE ). * Date and time cannot be set with printing 3/4 mark
(0~23) Operation flowchart
ON.
* LCD segment test pin is provided, a SEGON is
pull-low which will force all segments ON. This test pin is normally pull-high through an on chip 1kW resistor.
* : mark is still at time mode, at time setting, digit se-
'9 8
M 1
1
1
0 :00
O..
A s ia n C a le n d a r
D a y , H o u r , M in u te
lected by SEL pin will blink at 1Hz and 1/2 duty rate.
* At setting mode (SET), printing 3/4 mark is OFF and
M 1
printing is inhibited.
* The selected digit (blinking) count up by one at short
1
'9 8 1
1
M
'9 8
'9 8
M 1
1
A m e r ic a n C a le n d a r
E u r o p e a n C a le n d a r
A s ia n C a le n d a r
intervals (1.0secTSET1.25sec), when the ON key is pressed for less than 1.0sec; if the SET key is pressed longer than 1.25sec, the digit will count up rapidly at 8Hz rate. * Printing is disabled during data and time setting.
Mode selection sequence and initial value: (MODE key) In digit setting, press the SET key
* The digit selected will blink at a 1hz rate. * The blinking digit (selected digit) will count up by itself.
T
ON
T
O..
* If SET key is pressed 1sec, the digit will count up
Debounce time of MODE, SEL, SET key is: ON recognition: when the ON key is pressed longer than TON, ON is recognized. 31.25msTON62.5ms, Rev. 1.00 5
rapidly at an 8Hz rate, otherwise count up by 1 every time its pressed (1sec).
* When
t h e co l o n ( : ) i s b l i n ki n g i n t h e Day-Hour-Minute mode, pressing the SET key will reset the seconds to 00. January 17, 2003
HT6750A
* When digit is set, the MODE key can interrupt the set* At calendar mode, no matter what style calendar is
ting mode and change to the next mode. Real time clock must count at any time even in change mode or adjusting mode. IN 3-key application, connect SWK to VSS and SEL. Press the switch MODE to change the mode as shown on the chart below, press SEL to select resetting data, press SET key to adjust the selected data. To select digit, press selection key (SEL key), 3/4 mark is OFF during selection.
displayed. The sequence of selected digit is always Year(R)Month(R)Day(R)Normal state. The selected digit will blink at a 2Hz rate.
* At time mode, Day is not selected. The sequence of
the selected digit is Hour(R)Minute(R)Normal state.
T o in c r e a s e , p r e s s th e S E T k e y
'9 9
MODE
M 12
30
SEL
'9 9
M 12
30
SEL
'9 9
M 12
30
SEL
'9 9
M 12
30
SEL
30
MODE
M 19 :36
SEL
30
19 :36
SEL
30
19 :36
SEL
30
19 :36
SEL
If p r e s s S E T k e y w ill r e s e t s e c o n d to z e r o .
MODE
M 12
MODE
30
'9 9
SEL
M 12
30
'9 9
SEL
M 12 30 '9 9
SEL
M 12 30 '9 9
SEL
30
MODE
M 12
'9 9
SEL
30
M 12
'9 9
SEL
30
M 12
'9 9
SEL
30
M 12
'9 9
SEL
LCD segment format
M1 M2 T A . G 6 D 12 11 5A 5D 5E 5. 13 12 5B 5C 5G 14 13 T 6E 6. 15 14 6A 6D 6G 6C 6B COM3 COM3 16 15 17 18 C 1 2 3 4 P 5 E B
C1
C2
P in N o . 1 SEG
2 3 1 2 1A 1D 1E 1.
4 3 C1 2E M1 4
5 5
6 6
7 7 3A 3D 3E 3G
8 8
9
10 9 4A 4C 4G
11 10 C2 P 4B
COM1
1B 1C 1G
2. 2D 2G
2A 2C 2B
M2 3C 3B
4. 4D 4E
Rev. 1.00
6
January 17, 2003
HT6750A
Application Circuits
D is p la y P r in tin g V
DD
C O M 1 ~ C O M 3,SEG 1 ~ SEG 15 12p. 0 .1 m . VDD OSCI OSCO V.4 VSS 0 .1 m . V.2 X LC1 LC2 MODE SEL SET R eset TEST2 T D Lam p 100p.
1 .8 V V
DD
H T6750A
0 .1 m .
E x t. tr ig g e r
0 .1 m .
Rev. 1.00
7
January 17, 2003
HT6750A
Holtek Semiconductor Inc. (Headquarters) No.3, Creation Rd. II, Science Park, Hsinchu, Taiwan Tel: 886-3-563-1999 Fax: 886-3-563-1189 http://www.holtek.com.tw Holtek Semiconductor Inc. (Taipei Sales Office) 4F-2, No. 3-2, YuanQu St., Nankang Software Park, Taipei 115, Taiwan Tel: 886-2-2655-7070 Fax: 886-2-2655-7373 Fax: 886-2-2655-7383 (International sales hotline) Holtek Semiconductor Inc. (Shanghai Sales Office) 7th Floor, Building 2, No.889, Yi Shan Rd., Shanghai, China 200233 Tel: 021-6485-5560 Fax: 021-6485-0313 http://www.holtek.com.cn Holtek Semiconductor Inc. (Shenzhen Sales Office) 43F, SEG Plaza, Shen Nan Zhong Road, Shenzhen, China 518031 Tel: 0755-8346-5589 Fax: 0755-8346-5590 ISDN: 0755-8346-5591 Holtek Semiconductor Inc. (Beijing Sales Office) Suite 1721, Jinyu Tower, A129 West Xuan Wu Men Street, Xicheng District, Beijing, China 100031 Tel: 010-6641-0030, 6641-7751, 6641-7752 Fax: 010-6641-0125 Holmate Semiconductor, Inc. (North America Sales Office) 46712 Fremont Blvd., Fremont, CA 94538 Tel: 510-252-9880 Fax: 510-252-9885 http://www.holmate.com Copyright O 2003 by HOLTEK SEMICONDUCTOR INC. The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek assumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable without further modification, nor recommends the use of its products for application that may present a risk to human life due to malfunction or otherwise. Holteks products are not authorized for use as critical components in life support devices or systems. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information, please visit our web site at http://www.holtek.com.tw.
Rev. 1.00
8
January 17, 2003


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